Breakthrough in Ferroelectric Transistors Enables Polarity-Controlled Memory and Computing

Polarity-Dependent Breakthrough in Ferroelectric Transistors

Researchers have reportedly achieved a significant advancement in ferroelectric transistor technology by demonstrating how semiconductor polarity can control ferroelectric behavior, according to recent findings published in Nature Communications. The study reveals a previously unknown competition mechanism between ferroelectric polarization and charge trapping that varies depending on whether n-type or p-type semiconductors are used.

Polarity-Dependent Breakthrough in Ferroelectric Transistors
Fundamental Challenge in Ferroelectric Transistors
Novel Heterogeneous Regulation Mechanism
Experimental Validation with Hybrid Perovskite
Device Fabrication and Performance
Implications for Future Electronics

Fundamental Challenge in Ferroelectric Transistors

Sources indicate that conventional ferroelectric field-effect transistors (FeFETs) have long faced a fundamental limitation described as an “all or none” homogeneous regulation mechanism. Analysts suggest this limitation stems from competing physical processes where ferroelectric polarization is often eliminated by charge trapping at interface sites. The report states that charge trapping generates fields opposite to the gate electric field, creating non-switching “dead layers” that impede polarization flipping.

According to the research team, this competition between ferroelectric effects and charge trapping has traditionally resulted in volatile synaptic weight updates and limited the practical applications of FeFETs in multi-level memory and in-memory computing. The inability to achieve controllable transitions between these competing mechanisms has been a persistent challenge in the field.

Novel Heterogeneous Regulation Mechanism

Through sophisticated TCAD numerical simulations, researchers reportedly uncovered that ferroelectric polarization depends not only on trap distribution but critically on semiconductor channel polarity. The simulations revealed that n-type molybdenum disulfide (MoS₂) FeFETs exhibit clockwise hysteresis loops dominated by charge trapping, while p-type black phosphorus (BP) FeFETs under similar conditions show clockwise loops controlled by ferroelectric effects., according to further reading

The report states this polarity-dependent behavior is attributed to asymmetric electron trapping. In n-type semiconductors with electron majority carriers, positive gate voltage enhances electron trapping, creating a significant built-in field that prevents ferroelectric dipole flipping. In contrast, p-type devices show insufficient trapped electrons to form adequate blocking fields, allowing ferroelectric polarization to align with the gate field.

Experimental Validation with Hybrid Perovskite

To experimentally demonstrate this mechanism, researchers synthesized two-dimensional hybrid organic-inorganic ferroelectric perovskite materials identified as (EATMP)PbBr₄ (simplified as ETPB). Analysis indicates this material exhibits spontaneous polarization parallel to the perovskite plane at room temperature, with both vertical and horizontal piezoelectric responses confirmed through piezo-electric force microscopy.

According to the report, the ETPB films demonstrated well-defined ferroelectric hysteresis loops with a coercive field of 0.3 MV/cm and remanent polarization of 1.1 μC/cm². First-principles calculations reportedly revealed that bromide vacancies in the perovskite structure serve as inherent electron trapping sites, with notable charge accumulation near vacancy sites and increased density of states near the conduction band minimum.

Device Fabrication and Performance

The research team fabricated three distinct two-dimensional ferroelectric heterojunction transistors (2DFHTs) using n-type MoS₂, bipolar tungsten diselenide (WSe₂), and p-type BP semiconductor layers deposited onto ETPB ferroelectric films. Experimental results reportedly confirmed the polarity-dependent behavior predicted by simulations.

Sources indicate that n-type MoS₂ 2DFHTs demonstrated charge trapping-dominated clockwise hysteresis, while p-type BP devices showed ferroelectric-dominated clockwise hysteresis. The bipolar WSe₂ devices exhibited particularly interesting behavior, displaying ferroelectric characteristics in the p-region and charge trapping-dominated behavior in the n-region within a single device.

The report states that these bipolar transistors achieved state-of-the-art performance with an on/off ratio of 3 × 10⁶ and peak mobility of 195 cm²V⁻¹s⁻¹ in the p-type regime. Multiple devices reportedly showed consistent hysteresis directions, demonstrating reproducible polarity-dependent ferroelectric control.

Implications for Future Electronics

Analysts suggest this discovery of polarity-dependent ferroelectric modulation could enable new approaches to non-volatile memory and neuromorphic computing systems. The ability to selectively enhance or suppress ferroelectric behavior through semiconductor choice and trap engineering reportedly provides unprecedented design flexibility.

Researchers indicate that the integration of both competing mechanisms within a single bipolar device opens possibilities for multifunctional transistors that can be dynamically reconfigured between different operating modes. This advancement could potentially overcome the traditional limitations of FeFETs and enable more sophisticated in-memory computing architectures.

The study concludes that the coupling between semiconductor polarity, charge trapping, and ferroelectricity in two-dimensional hybrid perovskite heterostructures represents a promising platform for developing next-generation electronic devices with enhanced functionality and performance.